1. Technical Field
The present disclosure relates to a data processing apparatus, such as a personal computer, a cellular phone, or any other type of multimedia or communication apparatus, that utilizes a universal asynchronous receiver-transmitter (UART), and to a method of asynchronous data communication, a computer program product for a programmable processor, and a UART module.
2. Description of the Related Art
Universal asynchronous receiver-transmitter (UART) modules allow a data processing apparatus to communicate with another apparatus without any particular clock signal synchronization between the respective devices. A transmitting UART module transmits a serial data signal that comprises consecutive serial bit packets to a receiving UART module. A serial bit packet typically comprises, in order of occurrence, a start bit, a series of data bits, and a stop bit. A serial data packet may further comprise a parity bit for error checking purposes. The parity bit typically occurs between the last data bit and the stop bit.
The serial data signal has a given baud rate. The baud rate is the number of bits per second (bit/s). A standard baud rate for a computer is 115,200 bit/s. Industry standard baud rates of 921,600 bit/s and 3,686,400 bit/s have been derived from the aforementioned standard baud rate. There is some tolerance in the sense that an actual baud rate, which the transmitting UART module produces, may deviate to a certain extent from the standard baud rate of interest. The actual baud rate typically depends on a locally generated clock signal that the transmitting UART module receives.
The receiving UART module samples the serial data signal on the basis of a locally generated clock signal, which need not be synchronized with the locally generated clock signal that the transmitting UART module receives. This accounts for the term “asynchronous”. The receiving UART typically samples the serial data signal with a sampling frequency that is 16 times the baud rate plus or minus a frequency error due to asynchrony. The frequency error should remain below a critical threshold in order to avoid data errors.
European patent application published under number 0 605 751 describes a microcomputer that contains a sampling rate selection circuit for dividing a sampling signal from a baud rate generator by a division value, which is set in a sampling rate selection register. Accordingly, the sampling rate of a sampling signal, which is supplied to a shift register, can be switched within the range of multiples of at least two different numbers.